A problem exists in the production of a relatively constant current source with a very low voltage drop across the current source. The problem is best explained with reference to FIGS. 1A, 1B, and 2.
Referring now to FIG. 1A, there is shown a prior art circuit consisting of a vertical n-p-n bipolar transistor T10 having an emitter e, 16, a base b, 14, and a collector c, 12, with the collector being connected via a resistor R to a positive voltage source +V, the emitter being connected to ground potential, and the base being connected to a source of bias voltage Vbias. Assuming that Vbias causes a constant base current (Ib) to be supplied to the base of transistor T10 in a direction to forward bias an base-to-emitter junction thereof, T10 operates in what is known as a "normal" mode whereby conventional (i.e., positive) current (Ics) flows from +V through R and via the collector and emitter of T10 to ground potential.
Referring now to FIG. 1B, there is shown a cross-sectional view of a portion of a simplified view of a p-type conductivity semiconductor substrate 10 in which the vertical bipolar transistor T10 of FIG. 1A is formed. Within a portion of substrate 10 is a region 12 which is a region of n-type conductivity semiconductor material which has a region 14 of a p-type conductivity formed therein. Within a portion of region 14 is formed a region 16 of n-type conductivity. When a voltage is applied to region 12 which is more positive than the voltage applied to region 16, and when a base voltage and base current (Ib) are applied to region 14 to forward bias region 14 relative to region 16, positive current Ics flows from region 12 through region 14 and then into and through region 16. The current (i.e., the emitter current) flowing in region 16 is then the sum of Ics and Ib. With T10 so biased, it is operated in what is known in the art as the "normal" mode of operation. Applying a more positive voltage to region 12 than to region 16 and forward biasing region 14 relative to region 16 results in the normal mode of operation and results in regions 12, 14 and 16 being defined as the collector c, base b, and emitter e of T10. Regions 12 and 16 are both n-type conductivity regions, but they are not symmetrical with respect to region 14.
In the "normal" mode of operation, region 12, which surrounds the base region 14 and provides good current collecting efficiency, is biased to function as the collector of the transistor T10, and region 16, which is formed within the base region 14 and has a significantly smaller area than base region 14, is biased to function as the emitter of the transistor.
Referring now to FIG. 2, there is shown a graph of the collector current Ics (in milliamps) on the y-axis as a function of the collector-emitter voltage Vce (in volts) on the x-axis of T10 of FIG. 1A. As Vce applied across the transistor T10 increases from zero to the 200 to 250 millivolt range, the amplitude of Ics flowing between the collector and emitter varies (virtually) directly as a function of Vce. This range of transistor operation in which the base-to-collection junction is normally forward biased is known in the bipolar transistor art as the "saturation region". As Vce is increased above the 280 millivolt level (point A on the curve of FIG. 2), the current Ics increases very slightly with large increases of Vce. That is, Ics becomes relatively independent of Vce and the transistor T10 of FIG. 1A exhibits a high dynamic impedance and can then function as a relatively constant current generator or current source. The region of operation above point A is known in the bipolar transistor art as the "linear" region of operation. Thus, for the transistor T10 to function as a relatively constant current source with relatively large dynamic impedance, it must be operated in this "linear" region with a Vce of 280 millivolts or more.
As shown in FIG. 2, there must be a Vce of approximately 280 millivolts across the collector-to-emitter of T10 for it to function as a relatively constant current source. The 280 millivolts of collector-to-emitter voltage (also referred to herein as "Vcen") represents the voltage drop needed between the collector and emitter of an n-p-n bipolar transistor for it to function as a relatively constant current source when operated in the normal mode. Thus, where vertical bipolar transistors such as T10, operating in the normal mode, are designed and connected to function as current sources in circuit with other transistors, it is necessary that 280 millivolts of the power supply voltage be allotted as a voltage drop across the current source. This obviously limits the minimum value of power supply voltage that can be used to operate a circuit using these transistors. This is a significant problem in many applications since it is generally desirable to operate circuits at a lower power supply voltage to save power and reduce stress across the components of the circuits.
Another problem with prior art current sources formed as part of current mirrors is best explained with reference to a current mirror circuit shown in FIGS. 3 and 4.
Referring now to FIG. 3, there is shown an electrical schematic of a prior art current mirror circuit in which an n-p-n transistor T1 is used to produce a reference current Iref and an n-p-n transistor T2 is used to function as a relatively constant current source of a current (Ics1). The circuit also includes resistors R1 and R2. Transistors T1 and T2 are connected to operate in a common emitter configuration and in the normal mode. Each one of transistors T1 and T2 has a base b, an emitter e and a collector c. The collector and base of T1 and the base of T2 are connected via a resistor R1 to a power terminal 15 to which is applied a positive operating potential of +V volts. The collector of T2 is connected via resistor R2 to the terminal 15. The emitters of T1 and T2 are connected to a power terminal 17 to which is applied ground potential. The base-to-emitter area of T2 is designed to be M times the base-to-emitter area of T1 so that the current source current Ics1 is equal to M times the reference current Iref (neglecting the effect of leakage currents).
The relationship between the reference current Iref and the current source current(Ics1) may be expressed as follows: EQU Iref=IcT1+IbT1+IbT2
where IcT1 is the collector current of T1, and IbT1 and IbT2 are the base currents of T1 and T2, respectively.
If T2=MT1 (i.e., the base-to-emitter area of T2 is M times that of T1); then: Ics1=Ic of T2=(M)(Ic of T1); assuming that the current gain of T2 is relatively high compared to 1.
T1 and T2 are preferably vertical bipolar transistors formed and interconnected as shown in cross section in FIG. 4 so as to have T1 and T2 function effectively and efficiently as a current mirror and for T2 to function as a relatively constant current source.
Referring now to FIG. 4, there is shown a combination schematic and cross-sectional view of a prior art implantation of the transistors of the current mirror circuit of FIG. 3 in silicon technology. Transistors T1 and T2 are shown formed in portions of a semiconductor substrate 220 which is of p-type conductivity and in portions of an n-type epitaxial layer which is formed on a top surface of substrate 220 and are electrically isolated from each other by silicon dioxide regions. T1 and T2 are each vertical n-p-n transistors with each having an n+ type conductivity emitter (regions 121 and 122, respectively), a p-type conductivity type base (regions 141 and 142, respectively), and a collector region comprising a portion of the n-type epitaxial region and an n+ type conductivity sub-collector region with an n+ type conductivity reach through (RT) region extending to the collector (regions 161, 181, and 201 of T1, and regions 162, 182 and 202 of T2, respectively). As shown in FIG. 4, the collector of T1 is wire connected to the base (bT1) thereof and to the base of T2 (bT2). The emitter of T1 (eT1) and the emitter of T2 (eT2) are wire connected to ground. The collector of T1 is wire connected to R1 to pass Iref, and the collector of T2 is wire connected to R2 to pass Ics1. The resistors R1 and R2 and the connections thereto are typically formed on portions of substrate 220 which are not shown in FIG. 4.
To manufacture the current mirror shown in FIG. 4, each one of its transistors (i.e., T1 and T2) must be formed separately. That is, each one of transistors T1 and T2 must be formed with a separate n+ type conductivity sub-collector pocket and each transistor must be isolated (e.g., by dielectric isolation) from the other. Since T1 and T2 are interconnected as if they were two, separate, discrete transistors, and since they can not be integrated within a single collector region, a significant amount of silicon area and several wire connections are needed to form a current mirror with vertical bipolar transistors operating in the normal mode.
Thus, current mirrors formed in accordance with the prior art suffer from two significant problems. One problem is that for the transistors in the current mirrors to function as good current sources, the voltage (Vcen) across their collector-to-emitter must be equal to, or greater than, 280 millivolts. The other problem is that the reference and current source transistors can not be integrated or formed in one collector region.
It is desirable to form semiconductor current sources comprising bipolar transistors which do not require several hundred millivolts of voltage drop across their collector to emitter for the transistors to function as current sources, and to produce semiconductor current sources which can be formed using less silicon area than prior art circuits.